A sample of Samsung Electronics' HBM4E 12-layer chip [Samsung Electronics]
A sample of Samsung Electronics' HBM4E 12-layer chip [Samsung Electronics]

Samsung Electronics and SK Hynix will both present on high-bandwidth memory at Hot Chips, a premier semiconductor conference set for next month in Silicon Valley, where the two companies plan to outline the latest technology trends in HBM.

According to industry sources Friday, the two chipmakers will attend Hot Chips at Stanford University from Aug. 23 to 25 and deliver tutorial presentations on the opening day. As memory technology grows increasingly central to AI semiconductors, both companies will hold dedicated sessions on HBM.

Hot Chips has been held annually in Silicon Valley every August since 1989. The conference focuses on next-generation semiconductor technology, with an emphasis on real products and achievable innovations, and draws major players from across the chip industry. This year's lineup includes Nvidia, Broadcom, Micron, Intel, AMD, Arm and Infineon, alongside AI investors Google, Meta, Microsoft and OpenAI.

Samsung Electronics will present on HBM base die technology developed in conjunction with its foundry operations. Han Sang-wook, a principal engineer at Samsung who leads the base die design team for HBM4, HBM4E and HBM5, will speak on the future direction of HBM development using logic process technology.

Starting with the sixth-generation HBM4, Samsung replaced conventional memory processes with its foundry division's fourth-generation 4-nanometer process to boost HBM performance and power efficiency. The base die sits beneath the core dies and serves as the data interface between HBM and external processors such as CPUs and GPUs.

Samsung views its foundry capabilities as a core competitive advantage for future HBM. The company's memory division manufactures the HBM core dies while the foundry division produces the base dies, enabling a one-stop process from fabrication through packaging.

Samsung plans to continue leveraging logic processes to meet customers' high-performance demands. For the eighth-generation HBM5, the company intends to adopt a 2-nanometer leading-edge process based on a gate-all-around structure for the base die, expecting significant gains in operating speed and power efficiency.

SK Hynix's seventh-generation HBM4E 12-layer sample [SK Hynix]
SK Hynix's seventh-generation HBM4E 12-layer sample [SK Hynix]

SK Hynix will present on advanced HBM packaging technology. Lee Jae-sik, vice president of SK Hynix America and head of package engineering, will deliver the presentation. Lee joined SK Hynix in 2023 after stints at Nvidia, Qualcomm, Google and Meta.

Packaging technology is critical for HBM, which stacks multiple layers of DRAM. SK Hynix shipped 12-layer HBM4E samples to major customers last month, incorporating the company's proprietary advanced MR-MUF (Mass Reflow Molded Underfill) process.

MR-MUF is a process in which chips are stacked and a liquid protective material is injected into the gaps between them to shield the circuitry before being cured. Compared with methods that lay down a film-type material after each individual chip is added, MR-MUF is more process-efficient and more effective at dissipating heat.

SK Hynix is also exploring hybrid bonding technology in preparation for HBM stacks of 16 or more layers. The technique bonds copper directly to copper between chips without forming bumps, reducing the overall stack thickness and enabling higher layer counts.

Meanwhile, Samsung Electronics will also present at Hot Chips on next-generation memory technology, including LPDDR5X-PIM, a low-power DRAM designed for AI inference. Billed as the world's first LPDDR-based processing-in-memory solution, it integrates computing functions directly inside the memory chip, allowing the memory to handle simple operations itself to reduce bottlenecks and improve power efficiency.

Samsung will additionally present on CXL (Compute Express Link), a next-generation interconnect technology that enables CPUs, GPUs and memory to communicate seamlessly. While current architectures limit the amount of DRAM that can be connected to a motherboard, adding a CXL memory module — known as CMD-D — dramatically expands available memory capacity.


jeongwan@heraldcorp.com