The logo of TSMC, the world's largest semiconductor foundry. [Reuters]
The logo of TSMC, the world's largest semiconductor foundry. [Reuters]

TSMC, the world's largest semiconductor foundry, has successfully developed a 1.6-nanometer process chip that delivers up to 10 percent faster processing speeds and cuts power consumption by up to 20 percent compared with its enhanced 2nm process. The Taiwan-based chipmaker plans to begin mass production of the 1.6nm chip in the fourth quarter of this year, as competition intensifies in advanced semiconductors for AI and high-performance computing.

According to Taiwanese media including Liberty Times, TSMC has completed development and verification of its angstrom-class A16 (1.6nm) process, which incorporates the company's backside power delivery network technology known as Super Power Rail.

The key innovation in A16 is the relocation of power-delivery wiring from the front of the wafer to the back. Previously, data signal lines and power lines shared the front surface of the wafer, creating growing space constraints and interference problems as process nodes shrank.

Using Super Power Rail technology, TSMC separates the power supply network to the wafer's backside and delivers power directly to the source and drain regions of individual transistors through vertical backside contacts. This reduces bottlenecks between signal and power wiring, improving both performance and power efficiency at the same time.

TSMC also worked to preserve compatibility with existing chip designs. The company minimized changes to gate structures, device dimensions and layout area on the wafer's front side, lowering the burden of migrating existing designs to the A16 process.

The performance gains are significant. Compared with TSMC's enhanced 2nm N2P process, A16 delivers 8 to 10 percent faster processing at the same power level, reduces power consumption by 15 to 20 percent at equivalent speeds, and improves chip density by 8 to 10 percent.

AI accelerators and HPC chips — where large-scale computation and power efficiency are paramount — are the primary target markets. TSMC is expected to begin mass production of A16 in the fourth quarter of this year.

A16 also serves as a stepping stone toward TSMC's planned 1.4nm-class A14 process. A14 represents a full node transition and is targeted for mass production in 2028. The successful development of A16 is expected to lend momentum to those plans.

TSMC is also ramping up investment to maintain its lead in advanced processes. The company's board approved on Aug. 11 a capital expenditure plan of $29.44 billion for advanced process technology and advanced packaging, among other areas.

Surging demand for AI chips is also driving broader collaboration in advanced packaging. As TSMC's chip-on-wafer-on-substrate CoWoS production capacity struggles to keep pace with demand, some packaging orders have reportedly been transferred to Intel's factory in Malaysia.

Liu Pei-chen, a researcher at the Taiwan Institute of Economic Research, said the semiconductor industry is shifting away from a winner-takes-all structure toward a model of specialization and regionalization built on mutual complementarity. TSMC handles the most advanced miniaturized processes while other companies share back-end and packaging work — a structure that lets the industry respond to AI market expansion while spreading geopolitical risk, Liu said.


sjy@heraldcorp.com